In the past, in a case where various digital signals such as a clock signal and a control signal are transmitted from a block that operates by a predetermined power source to a block that operates by another power source different from the above power source, a level shifter circuit that converts a signal level of the digital signal has been used.
For example, in a case where the digital signal is transmitted from a front-stage block to a rear-stage block via a level shifter circuit, when a power source of the front-stage block is not activated, a through current flows and current consumption is increased in a general level shifter circuit.
In this regard, the technologies of constantly monitoring the power source to thus prevent the through current from flowing are proposed (see, for example, Patent Literature 1 and Patent Literature 2).
In those technologies, a power source monitoring circuit monitors a power source status of a front-stage block, and in a state where a power source that supplies power to the front-stage block is not activated, the logic of the level shifter circuit is determined and the through current is prevented from flowing in the level shifter circuit.